Abstract: System in Package (SiP), with its heterogeneous integration and three-dimensional interconnection technology, has become a key breakthrough in the post-Moore era. SiP integrates multi-level interconnection structures with size spans across three orders of magnitude. Due to the reduced dimensions of interconnections, the cost and complexity of traditional analysis methods have significantly increased, necessitating a fast and accurate evaluation approach. This paper predicts the morphology of interconnection solder joints and, based on the predictions, establishes an equivalent simplified SiP device model, as well as Controlled Collapsed Chip Connection (C4) and Chip Connection (C2) sub-models, reducing the difficulty of simulation calculations. Finite element analysis (FEA) is then performed on SiP devices under actual operating conditions using the sub-model method. Thermal cycling simulations identify stress-critical points, and sub-model calculations are performed at these locations. A comparative analysis of the predicted lifespans of different interconnection structures is conducted, leading to the identification of the optimal interconnection structure.