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3D封装芯片焊点可靠性有限元分析

Finite element analysis of solder joint reliability of 3D packaging chip

  • 摘要: 选择工业中广泛使用的Sn,Sn3.9Ag0.6Cu钎料作为三维封装芯片键合焊点材料,采用ANSYS有限元软件建立三维封装模型,基于Garofalo-Arrhenius本构方程,进行−55 ~ 125 °C热循环模拟,并通过田口法探讨封装结构和工艺参数对焊点的可靠性影响. 结果表明,Cu柱与焊点接触处是整个结构的薄弱区域,在IMC焊点阵列中最右列第二个焊点处出现最大应力. 通过田口法,结合有限元模拟结果,获得了4个因子对S/N的贡献度由大到小依次为:焊点阵列、焊点高度、芯片厚度、焊点材料. 其中焊点阵列的影响最大,其次是焊点高度、芯片厚度,焊点材料影响最小. 基于优化设计,获得了最优的匹配组合为3 × 3阵列,焊点高度0.02 mm,芯片厚度0.2 mm,焊点材料Cu6Sn5.

     

    Abstract: In this paper, Sn and Sn3.9Ag0.6Cu solders, which are widely used in industry, were selected as bonding materials for 3D packaging chips. The 3D packaging model was established using ANSYS finite element software. Based on the Garofalo-Arminius’s constitutive equation, the process of thermal cycle under the temperature condition from −55 ~ 125 °C. In addition, the influence of packaging structure and process parameters on the reliability of solder joint was discussed by Taguchi method. The results show that the contact area between Cu pillar and solder joint is the weak area of the whole structure, and the maximum stress appears at the second solder joint in the rightmost row of the intermetallic compound (IMC) solder joint array. Through the Taguchi method and combined with the finite element simulation results, the contribution of the four factors to S/N was obtained as follows: solder joint array, solder joint height, chip thickness, solder joint material, of which the solder joint array has the largest influence, followed by solder joint height and chip thickness, solder joint material has the least influence. Based on the optimization design, the optimal matching combination was solder joint array 3 × 3, solder joint height 0.02 mm, chip thickness 0.2 mm and solder joint material Cu6Sn5.

     

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